Browsing by Author "Martins, Celestino Virtudes Dias"
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- Adaptive error-prediction aging sensor for synchronous digital circuitsPublication . Martins, Celestino Virtudes Dias; Semião, Jorge Filipe Leal CostaThis paper presents a new approach on aging sensors for synchronous digital circuits. An Adaptive Error-Prediction Flip-Flop (AEP-FF) architecture with built-in aging sensor is proposed, to perform on-line monitoring of long-term performance degradation of CMOS digital systems, regardless of their origin. The main advantage is that the sensor’s performance degradation works in favor of the predictive error detection. Moreover, the sensor is out of the signal path, which allows sensor insertion with negligible performance penalty to the circuit. Performance error prediction is implemented by the detection of late transitions at flip-flop data input, caused by aging (namely, due to NBTI), by physical defects activated by long lifetime operation, or by other low drift operation dependent performance degradations. Performance errors must not occur in safety-critical systems (automotive, health, space), which highlights the importance of the Performance Failure Prediction (PFP) methodology. Sensors can be always active, to enhanced Predictive Fault-Detection (PFD), without reducing its sensing capability (in fact, aging degradations over the sensor itself enhances its sensitivity to PFD). Extensive SPICE simulations were performed with a 65 nm CMOS technology, which uses Berkeley Predictive Technology Models (PTM), to characterize in detail the sensor, and to compare it with previously developed solutions. Simulations show sensor advantages over the existing aging sensors and sensor insertion and operation is validated with two benchmark circuits. It is shown that the impact of aging degradation and/or PVT (Process, power supply Voltage and Temperature) variations on the sensor enhance error prediction.