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Projeto de investigação

High mobility transparent amorphous oxide semiconductors thin film transistors for active matrix displays

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Gate-bias stress in amorphous oxide semiconductors thin-film transistors
Publication . Lopes, M. E.; Gomes, Henrique L.; Medeiros, M. C. R.; Barquinha, P.; Pereira, L. M. C.; Fortunato, E.; Martins, R.; Ferreira, I.
A quantitative study of the dynamics of threshold-voltage shifts with time in gallium-indium zinc oxide amorphous thin-film transistors is presented using standard analysis based on the stretched exponential relaxation. For devices using thermal silicon oxide as gate dielectric, the relaxation time is 3 105 s at room temperature with activation energy of 0.68 eV. These transistors approach the stability of the amorphous silicon transistors. The threshold voltage shift is faster after water vapor exposure suggesting that the origin of this instability is charge trapping at residual-water-related trap sites.

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Entidade financiadora

Fundação para a Ciência e a Tecnologia

Programa de financiamento

3599-PPCDT

Número da atribuição

PTDC/EEA-ELC/64975/2006

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