Publication
An enhanced static-list scheduling algorithm for temporal partitioning onto RPUs
| dc.contributor.author | Cardoso, João | |
| dc.contributor.author | Neto, H. C. | |
| dc.contributor.editor | Silveira, L. M. | |
| dc.contributor.editor | Devadas, S. | |
| dc.contributor.editor | Reis, R. | |
| dc.date.accessioned | 2018-12-07T14:58:40Z | |
| dc.date.available | 2018-12-07T14:58:40Z | |
| dc.date.issued | 2000 | |
| dc.description.abstract | This paper presents a novel algorithm for temporal partitioning of graphs representing a behavioral description. The algorithm is based on an extension of the traditional static-list scheduling that tailors it to resolve both scheduling and temporal partitioning. The nodes to be mapped into a partition are selected based on a statically computed cost model. The cost for each node integrates communication effects, the critical path length, and the possibility of the critical path to hide the delay of parallel nodes. In order to alleviate the runtime there is no dynamic update of the costs. A comparison of the algorithm to other schedulers and with close-to-optimum results obtained with a simulated annealing approach is shown. The presented algorithm has been implemented and the results show that it is robust, effective, and efficient, and when compared to other methods finds very good results in small amounts of CPU time. | |
| dc.identifier.isbn | 0-7923-7731-1 | |
| dc.identifier.issn | 1571-5736 | |
| dc.identifier.uri | http://hdl.handle.net/10400.1/12146 | |
| dc.language.iso | eng | |
| dc.peerreviewed | yes | |
| dc.publisher | Kluwer Academic Publishers | |
| dc.relation.ispartofseries | International Federation for Information Processing | |
| dc.title | An enhanced static-list scheduling algorithm for temporal partitioning onto RPUs | |
| dc.type | conference object | |
| dspace.entity.type | Publication | |
| oaire.citation.conferencePlace | Lisbon, Portugal | |
| oaire.citation.endPage | 496 | |
| oaire.citation.startPage | 485 | |
| oaire.citation.title | Vlsi: Systems on A Chip | |
| oaire.citation.title | Ifip 10Th International Conference on Very Large Scale Integration (Vlsi 99) | |
| oaire.citation.volume | 34 | |
| person.familyName | Cardoso | |
| person.givenName | João | |
| person.identifier | R-000-75E | |
| person.identifier.ciencia-id | 5C1C-8247-D614 | |
| person.identifier.orcid | 0000-0002-7353-1799 | |
| person.identifier.rid | C-5552-2008 | |
| person.identifier.scopus-author-id | 9639597300 | |
| rcaap.rights | openAccess | |
| rcaap.type | conferenceObject | |
| relation.isAuthorOfPublication | 79578924-64ce-404f-8acc-44edff5eecb8 | |
| relation.isAuthorOfPublication.latestForDiscovery | 79578924-64ce-404f-8acc-44edff5eecb8 |
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